module fulladder1(A,B,Cin,S,Cout);

	input A,B,Cin;
	output S,Cout;

	wire A_xor_B,n1,n2;
	xor2 U0 (.in1(A),.in2(B),.out(A_xor_B));
	xor2 U1 (.in1(A_xor_B),.in2(Cin),.out(S));
	nand2 U2 (.in1(A),.in2(B),.out(n1));
	nand2 U3 (.in1(Cin),.in2(A_xor_B),.out(n2));
	nand2 U4 (.in1(n1),.in2(n2),.out(Cout));

endmodule
